CDMA IF VGAs and I/Q Demodulators
with VCO and Synthesizer
2.4k ?
47pF
0.01 μ F
0.01 μ F
0.1 μ F
V CC
0.068 μ F
0.01 μ F
BYP
CP_OUT
GND
BYP
BYP
FM-
0.01 μ F
10k ?
33pF
TANKL+
FM+
FM
CDMA+
2pF
33nH
10k ?
33pF
MAX2306
680 ?
CDMA
TANKL-
10k ?
33pF
CDMA-
TANKH+
VGC
47pF
DAC
10k ?
2pF
33pF
33nH
V CC
TANKH-
MODE
V CC
V CC
V CC
DATA
47pF
GND
REF
SHDN
IOUT+
EN
CLK
QOUT+
3-WIRE
I
10k ?
IOUT-
QOUT-
10k ?
Q
LOCK
47k ?
V CC
Figure 1. MAX2306 Typical Operating Circuit
Voltage-Controlled Oscillator,
Buffers, and Quadrature Generation
The LO signal for downconversion is provided by a
voltage-controlled oscillator (VCO) consisting of an on-
chip differential oscillator, and an off-chip high-Q reso-
nant network. Figure 4 shows a simplified schematic of
the VCO oscillator. Multiband operation is supported by
the MAX2306 with dual VCOs. VCO_H and VCO_L are
selectable with the MODE pin or the VCO_SEL (VS)
control bit. They oscillate at twice the desired LO fre-
quency. For applications requiring an external LO, the
VCOs can be bypassed with the VCO_BYP (VB) control
bit.
The MAX2309 buffers the output of the VCO and pro-
vides this signal at the LOOUT pin. This signal is
enabled by the BUFEN (BE) control bit or by the
BUFEN control pin. The frequency of this signal is
selected by the BUF_DIV (BD) control bit, and can be
either the VCO frequency or half the VCO frequency.
Quadrature downconversion is realized by providing in-
phase (I) and quadrature-phase (Q) components of the
LO signal to the LO ports of the demodulator described
above. The quadrature LO signals are generated by
dividing the VCO output frequency using two latches.
_______________________________________________________________________________________
9
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